Silicon Laboratories C8051F347 - Manual (Page 209)

Rev. 1.3 209
C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
Figure 18.6. UART Multi-Processor Mode Interconnect Diagram
Master
Device Slave
Device
TX RX RX TX
Slave
Device
RX TX
Slave
Device
RX TX
V+