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5 interrupt configuration, Table 2.50 compactpci bus interrupts, 5 interrupt configuration -8 – Inova High Performance CPU board ICP-PII User Manual

Page 32: Table 2.50 compactpci bus interrupts -8, Configuration, Icp-piii

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©2002 Inova Computers GmbH

Page 2-8

Doc. PD00581013.004

Configuration

ICP-PIII

Table 2.50 CompactPCI Bus Interrupts

2.5 Interrupt Configuration

The CompactPCI specification defines a total of six interrupt signals on the backplane. INTA#
through INTD# are used to route interrupts from the CompactPCI boards to the PIC on the ‘proc-
essor board. The interrupt request level generated by the device depends on the backplane slot
number which the board is plugged into, and the interrupt signal which is driven by the particular
PCI device.

Note:

CompactPCI interrupts may be shared

by multiple sources

CompactPCI

Bus Interrupts

CompactPCI

Bus Interrupts

INTA#

INTB#

INTC#

INTD#

INTP

( IRQ14 )

INTS

Serialized Interrupt

Refer to BIOS

Documentation

ENUM#

( IRQ5 )