Lsi53c120 pin diagram, Figure 3.1 – Avago Technologies LSI53C120 User Manual
Page 32
3-2
Specifications
Figure 3.1
LSI53C120 Pin Diagram
B_SSEL/
LSI53C120
128 PQFP
SCSI A Interf
ace Pins
SCSI B Single-ended Interf
ace Pins
SCSI B Differential Control
SCSI B Differential Control
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
NC
NC
VSS_IO
NC
NC
RESET/
VDD_IO
VDD_CORE
CLOCK
DIFF_MODE/
DIFF_SENSE
VSS_CORE
B_SDIR11
B_SDIR10
VSS_IO
B_SDIR9
B_SDIR8
B_IO_DIR
B_REQDIR
VDD_IO
B_CD_DIR
B_SELDIR
B_MSGDIR
B_RSTDIR
VSS_IO
B_A
CKDIR
NC
VSS_IO
XFER_A
CTIVE
NC
NC
NC
VDD_IO
VDD_CORE
NC
B_SDIR12
B_SDIR13
B_SDIR14
VSS_CORE
VSS_IO
B_SDIR15
B_SDIRP1
B_SDIR0
B_SDIR1
VDD_IO
B_SDIR2
B_SDIR3
B_SDIR4
B_SDIR5
VSS_IO
B_SDIR6
B_SDIR7
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
NC
NC
VDD-SCSI
A_SD12/
A_SD13/
A_SD14/
VSS_SCSI
A_SD15/
A_SDP1/
A_SD0/
A_SD1/
VSS_SCSI
A_SD2/
A_SD3/
A_SD4/
A_SD5/
VSS_SCSI
A_SD6/
A_SD7/
A_SDP0/
A_SATN/
VSS_SCSI
A_SBSY/
A_SACK/
A_SRST/
A_SMSG/
A_SSEL/
VSS_SCSI
A_SCD/
A_SREQ/
A_SIO/
A_SDB8/
VSS_SCSI
A_SD9/
A_SD10/
A_SD11/
VDD_SCSI
WS_ENABLE/
B_SDIRP0
B_ATNDIR
VDD_SCSI
B_SD12/
B_SD13/
B_SD14/
VSS_SCSI
B_SD15/
B_SDP1/
B_SD0/
B_SD1/
VSS_SCSI
B_SD2/
B_SD3/
B_SD4/
B_SD5/
Vss_SCSI
B_SD6/
B_SD7/
B_SDP0/
B_SATN/
Vss_SCSI
B_SBSY/
B_SACK/
B_SRST/
B_SMSG/
VSS_SCSI
B_SCD/
B_SREQ/
B_SIO/
B_SD8/
VSS_SCSI
B_SD9/
B_SD10/
B_SD11/
VDD_SCSI
B_BSYDIR
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64