2 re-timing logic, 3 precision delay control, Re-timing logic – Avago Technologies LSI53C120 User Manual
Page 21: Precision delay control, Section 2.1.1.1, “tolerant drivers and receivers

Interface Signal Descriptions
2-3
2.1.1.1
TolerANT Drivers and Receivers
The LSI53C120 features TolerANT technology, which includes active
negation on the SCSI drivers and input signal filtering on the SCSI
receivers. Active negation causes the SCSI Request, Acknowledge,
Data, and Parity signals to be actively driven HIGH rather than passively
pulled up by terminators.
TolerANT receiver technology improves data integrity in unreliable
cabling environments, where other devices would be subject to data
corruption. TolerANT receivers filter the SCSI bus signals to eliminate
unwanted transitions, without the long signal delay associated with
RC-
type input filters. This improved driver and receiver technology helps
eliminate double clocking of data, the single biggest reliability issue with
SCSI operations.
The benefits of TolerANT include increased immunity to noise on the
deasserting signal edge, better performance due to balanced duty
cycles, and improved SCSI transfer rates. In addition, TolerANT SCSI
devices prevent glitches on the SCSI bus at power-up or power-down, so
other devices on the bus are also protected from data corruption.
2.1.2 Re-timing Logic
The SCSI signals, as they propagate from one side of the LSI53C120 to
the other side, are processed by logic that re-times the bus signals as
needed to guarantee or improve required SCSI timings. The state
machine controls govern the re-timing logic to keep track of SCSI
phases, the location of initiator and target devices, and various timing
functions. In addition, the re-timing logic contains numerous precision
delay elements that are periodically calibrated by the Precision Delay
Control block in order to guarantee specified timings such as output
pulse widths, setup and hold times, and other elements.
2.1.3 Precision Delay Control
The Precision Delay Control block provides calibration information to the
precision delay elements in the Re-timing Logic block. This calibration
information provides precise timings as signals propagate through the
device. As the LSI53C120 voltage and temperature vary over time, the
Precision Delay Control block periodically updates the delay settings in