Chapter 7, Chapter 7 bios setup – DFI DT122-CR Manual User Manual

Page 47

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Chapter 7 BIOS Setup

Chapter 7

PCH-IO Configuration

PCI Express Coniguration
settings.

Intel PCH RC Version
Intel PCH SKU Name
Intel PCH Rev ID



PCI Express Confi guration



USB Confi guration



PCH Azalia Confi guration

PCH LAN Controller
Wake on LAN

After G3

1.0.0.0
QM77
04/C1

[Enabled]
[Enabled]

[Power on]

Chipset



Select Screen



Select Item

Enter: Select
+/-: Change Opt.
F1: General Help
F2: Previous

Values

F3: Optimized

Defaults

ESC: Exit

PCH LAN Controller

Enables or disables the PCH LAN Controller.

Wake on LAN Enable

Set this field to Enabled to wake up the system via the onboard LAN or via a LAN card

that supports the remote wake up function.

After G3

Power Off / WOL

Power-on the system via WOL after G3.
Power On

Power-on the system after G3.

USB Configuration

Enable or disable XHCI
pre-boot driver support.

USB Confi guration

XHCI Pre-Boot Driver

xHCI Mode
HS Port #1 Switchable
HS Port #2 Switchable
HS Port #3 Switchable
HS Port #4 Switchable
xHCI Streams

EHCI1

EHCI2

[Enabled]

[Smart Auto]
[Enabled]
[Enabled]
[Enabled]
[Enabled]
[Enabled]

[Enabled]

Chipset



Select Screen



Select Item

Enter: Select
+/-: Change Opt.
F1: General Help
F2: Previous

Values

F3: Optimized

Defaults

ESC: Exit

Enable or disable PCI
Express Clock Gating for
each root port.

PCI Express Confi guration

PCI Express Clock Gating

PCIE Port 1 is assigned to LAN



PCI Express Root Port 2



PCI Express Root Port 3



PCI Express Root Port 4



PCI Express Root Port 5

[Enabled]

Chipset



Select Screen



Select Item

Enter: Select
+/-: Change Opt.
F1: General Help
F2: Previous

Values

F3: Optimized

Defaults

ESC: Exit

PCI Express Configuration

PCI Express Clock Gating

Enables or disables PCI Express Clock Gating for each root port.

PCI Express Root Port 2 to PCI Express Root Port 5

Controls the PCI Express Root Port.