Altera Cyclone III LS FPGA Development Board User Manual
Page 42

2–34
Chapter 2: Board Components
Components and Interfaces
Cyclone III LS FPGA Development Board Reference Manual
© October 2009 Altera
Corporation
J1.102
Dedicated CMOS I/O bit 41
HSMB_D41
2.5-V
AE2
J1.103
Dedicated CMOS I/O bit 42
HSMB_D42
AC4
J1.104
Dedicated CMOS I/O bit 43
HSMB_D43
AD3
J1.107
Dedicated CMOS I/O bit 44
HSMB_D44
AB2
J1.108
Dedicated CMOS I/O bit 45
HSMB_D45
AD1
J1.109
Dedicated CMOS I/O bit 46
HSMB_D46
AB4
J1.110
Dedicated CMOS I/O bit 47
HSMB_D47
AD4
J1.113
Dedicated CMOS I/O bit 48
HSMB_D48
AA2
J1.114
Dedicated CMOS I/O bit 49
HSMB_D49
AC1
J1.115
Dedicated CMOS I/O bit 50
HSMB_D50
AA1
J1.116
Dedicated CMOS I/O bit 51
HSMB_D51
AB1
J1.119
Dedicated CMOS I/O bit 52
HSMB_D52
AA6
J1.120
Dedicated CMOS I/O bit 53
HSMB_D53
AB5
J1.121
Dedicated CMOS I/O bit 54
HSMB_D54
Y2
J1.122
Dedicated CMOS I/O bit 55
HSMB_D55
AB3
J1.125
Dedicated CMOS I/O bit 56
HSMB_D56
Y1
J1.126
Dedicated CMOS I/O bit 57
HSMB_D57
AB6
J1.127
Dedicated CMOS I/O bit 58
HSMB_D58
Y6
J1.128
Dedicated CMOS I/O bit 59
HSMB_D59
AA5
J1.131
Dedicated CMOS I/O bit 60
HSMB_D60
W1
J1.132
Dedicated CMOS I/O bit 61
HSMB_D61
Y3
J1.133
Dedicated CMOS I/O bit 62
HSMB_D62
W2
J1.134
Dedicated CMOS I/O bit 63
HSMB_D63
AA4
J1.137
Dedicated CMOS I/O bit 64
HSMB_D64
W3
U29.7
Dedicated CMOS I/O bit 65 when
LCD_HSMB_SEL is set to a logic 1.
LCD_HSMB_D65
P1
U28.4
Dedicated CMOS I/O bit 66 when
LCD_HSMB_SEL is set to a logic 1.
LCD_HSMB_D66
AE4
U29.9
Dedicated CMOS I/O bit 67 when
LCD_HSMB_SEL is set to a logic 1.
LCD_HSMB_D67
J4
U28.12
Dedicated CMOS I/O bit 68 when
LCD_HSMB_SEL is set to a logic 1.
LCD_HSMB_D68
AE1
Dedicated CMOS I/O bit 69 when
LCD_HSMB_SEL is set to a logic 1.
LCD_HSMB_D69
AF1
U28.9
Dedicated CMOS I/O bit 70 when
LCD_HSMB_SEL is set to a logic 1.
LCD_HSMB_D70
AD2
U29.4
Dedicated CMOS I/O bit 71 when
LCD_HSMB_SEL is set to a logic 1.
LCD_HSMB_D71
L1
U27.4
Dedicated CMOS I/O bit 72 when
LCD_HSMB_SEL is set to a logic 1.
LCD_HSMB_D72
V5
Table 2–35. HSMC Port B Pin Assignments, Schematic Signal Names, and Functions (Part 3 of 4)
(1)
Board
Reference
Description
Schematic Signal
Name
I/O Standard
Cyclone III LS
Device
Pin Number