Altera Cyclone III LS FPGA Development Board - Manual (Page 41)

Chapter 2: Board Components 2–33
Components and Interfaces
© October 2009 Altera Corporation Cyclone III LS FPGA Development Board Reference Manual
J1.44 Dedicated CMOS I/O bit 3 HSMB_D3
2.5-V
V6
J1.47 Dedicated CMOS I/O bit 4 HSMB_D4 L5
J1.48 Dedicated CMOS I/O bit 5 HSMB_D5 U2
J1.49 Dedicated CMOS I/O bit 6 HSMB_D6 L4
J1.50 Dedicated CMOS I/O bit 7 HSMB_D7 U3
J1.53 Dedicated CMOS I/O bit 8 HSMB_D8 K5
J1.54 Dedicated CMOS I/O bit 9 HSMB_D9 U5
J1.55 Dedicated CMOS I/O bit 10 HSMB_D10 K4
J1.56 Dedicated CMOS I/O bit 11 HSMB_D11 P4
J1.59 Dedicated CMOS I/O bit 12 HSMB_D12 J7
J1.60 Dedicated CMOS I/O bit 13 HSMB_D13 P3
J1.61 Dedicated CMOS I/O bit 14 HSMB_D14 J6
J1.62 Dedicated CMOS I/O bit 15 HSMB_D15 N6
J1.65 Dedicated CMOS I/O bit 16 HSMB_D16 H6
J1.66 Dedicated CMOS I/O bit 17 HSMB_D17 M6
J1.67 Dedicated CMOS I/O bit 18 HSMB_D18 H2
J1.68 Dedicated CMOS I/O bit 19 HSMB_D19 K3
J1.71 Dedicated CMOS I/O bit 20 HSMB_D20 H1
J1.72 Dedicated CMOS I/O bit 21 HSMB_D21 K2
J1.73 Dedicated CMOS I/O bit 22 HSMB_D22 G6
J1.74 Dedicated CMOS I/O bit 23 HSMB_D23 J3
J1.77 Dedicated CMOS I/O bit 24 HSMB_D24 G3
J1.78 Dedicated CMOS I/O bit 25 HSMB_D25 J1
J1.79 Dedicated CMOS I/O bit 26 HSMB_D26 G1
J1.80 Dedicated CMOS I/O bit 27 HSMB_D27 J2
J1.83 Dedicated CMOS I/O bit 28 HSMB_D28 G2
J1.84 Dedicated CMOS I/O bit 29 HSMB_D29 H3
J1.85 Dedicated CMOS I/O bit 30 HSMB_D30 F4
J1.86 Dedicated CMOS I/O bit 31 HSMB_D31 E3
J1.89 Dedicated CMOS I/O bit 32 HSMB_D32 F1
J1.90 Dedicated CMOS I/O bit 33 HSMB_D33 E4
J1.91 Dedicated CMOS I/O bit 34 HSMB_D34 F5
J1.92 Dedicated CMOS I/O bit 35 HSMB_D35 D1
J1.95 Dedicated CMOS I/O bit 36 HSMB_D36 E1
J1.96 Dedicated CMOS I/O bit 37 HSMB_D37 D3
J1.97 Dedicated CMOS I/O bit 38 HSMB_D38 E2
J1.98 Dedicated CMOS I/O bit 39 HSMB_D39 C1
J1.101 Dedicated CMOS I/O bit 40 HSMB_D40 AE3
Table 2–35. HSMC Port B Pin Assignments, Schematic Signal Names, and Functions (Part 2 of 4) (1)
Board
Reference Description
Schematic Signal
Name I/O Standard
Cyclone III LS
Device
Pin Number