Cirrus Logic CS1631 - Manual (Page 31)

CS1630/31
DS954F3 31
6.7 Configuration 2 (Config2) – Address 34
7 6 5 4 3 2 1 0
CLAMP1 CLAMP0 T2COMP - - - VALLEYSW -
Number Name Description
[7:6] CLAMP[1:0]
Configures the offset adjustment for the minimum measurable peak current
level on the second stage sense resistor when the gate drive is turned on.
CLAMP[1:0] is an unsigned integer in the range of 0
value3. The voltage on
the FBSENSE pin that corresponds to the minimum peak current is calculated
using the following formula:
[5] T2COMP
Configures T2 measurement compensation for second stage flyback designs
with a large delay between the fall of the primary current and the rise of the
secondary current during the switching cycle. When using this feature, the
measured T2 time (measured from the falling edge of the gate drive) is
adjusted to obtain the actual T2 time, allowing the control loop to tightly regu-
late the output currents and reduce errors.
0 = Disable T2 measurement compensation
1 = Enable T2 measurement compensation
[4:2] - Reserved
[1] VALLEYSW
Configures quasi-resonant switching (valley switching) on the second stage.
0 = Disables valley switching on the second stage
1 = Enables valley switching on the second stage
[0] - Reserved
1.4
IPEAK[2:0] 1 +   16    15 +   CLAMP[1:0] 8     – 8  +
512
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