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Cirrus Logic CobraNet User Manual

Page 129

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CobraNet Programmer’s Reference

Error Code Reference

DS651PM25

©

Copyright 2006 Cirrus Logic, Inc.

129

Byte

Code

Flash

Code

Type Name Description

Expected

Conditions

Unexpected

Conditions

9 3,3,1 FATAL

POST_B0M

Memory failure;

middle byte, main

bank.

-

Memory chip

problem. Data bus

problem. Address

bus problem.

10 5,3,1 FATAL

POST_B0H

Memory failure;

high byte, main

bank.

-

Memory chip

problem. Data bus

problem. Address

bus problem.

11 7,3,1 FATAL

POST_B1L

Memory failure;

low byte, high

bank.

-

Memory chip

problem. Data bus

problem. Address

bus problem.

12 1,4,1 FATAL

POST_B1M

Memory failure;

middle byte, high

bank.

-

Memory chip

problem. Data bus

problem. Address

bus problem.

13 3,4,1 FATAL

POST_B1H

Memory failure;

high byte, high

bank.

-

Memory chip

problem. Data bus

problem. Address

bus problem.

14 5,4,1 FATAL

POST_BUS

Address/data bus

test failure during

bus stress test.

-

Address and/or

data bus

performance is

marginal.

15 7,4,1 FATAL

POST_LOOPBACK

Ethernet physical

interface (PHY)

loopback test

failure. Cannot

transmit and

receive packet

correctly.

-

Problem with

Ethernet controller

(MAC or PHY).

Problem with

Ethernet DMA

(Xilinx).

16 1,5,1 FAULT

FLASH_FAILURE

Failure during flash

erase or write

operation.

Flash device has

fatigued due to

excessive

write/erase
operations.

Problem with flash

device or flash <->

DSP interface.

17 3,5,1 FAULT

FLASH_WRITE

Attempt to program

flash location
before erase.

-

Flash erase

failure.

18 5,5,1 FATAL

BAD_CONFIG

Bad configuration

record in flash

No configuration

parameters

specified during

boot bank

programming and

an existing

configuration

record could not be

found.

The configuration

record does not

match the main

code. Either the

flash is improperly

programmed or

there is a problem

with the flash bank

selection logic or

other address

decode logic.

19 7,5,1 FAULT

INT_UNEXPECTED

Interrupt occurred

while interrupts

were disabled.

- -