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B.24 dma channel assignments, Table b.25: dma channel assignments, B.25 interrupt assignments – Advantech INTEL AIMB-210 User Manual

Page 94: Table b.26: interrupt assignments, B.26 1st mb memory map, Table b.27: 1st mb memory map, B.24, Dma channel assignments, Table b.25:dma channel assignments, B.25

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AIMB-210 User Manual

82

B.24

DMA Channel Assignments

B.25

Interrupt Assignments

B.26

1st MB Memory Map

Table B.25: DMA Channel Assignments

Channel

Function

0

Available

1

Available

2

Floppy disk (8-bit transfer)

3

Available

4

Cascade for DMA controller 1

5

Available

6

Available

7

Available

Table B.26: Interrupt Assignments

Priority

Interrupt#

Interrupt source

1

NMI

Parity error detected

2

IRQ0

Interval timer

3

IRQ1

Keyboard

-

IRQ2

Interrupt from controller 2 (cascade)

4

IRQ8

Real-time clock

5

IRQ9

Cascaded to INT 0A (IRQ 2)

6

IRQ10

Serial communication port 3/5

7

IRQ11

Serial communication port 4/6

8

IRQ12

PS/2 mouse

9

IRQ13

INT from co-processor

10

IRQ14

Primary IDE Channel

11

IRQ15

Secondary IDE Channel

12

IRQ3

Serial communication port 2

13

IRQ4

Serial communication port 1

14

IRQ5

Available

15

IRQ6

Available

16

IRQ7

Parallel port 1 (print port)

Table B.27: 1st MB Memory Map

Addr. range (Hex)

Device

E0000h - FFFFFh

BIOS

CC000h - DFFFFh

Unused

C0000h - CBFFFh

VGA BIOS

A0000h - BFFFFh

Video Memory

00000h - 9FFFFh

Base memory