4 intel® ich7-m southbridge chipset, 1 intel® ich7-m overview, 2 intel® ich7-m low pin count (lpc) interface – IEI Integration IBX-530B-N270 User Manual
Page 28: 3 intel® ich7-m pcie bus, Ntel, Ich7-m, Outhbridge, Hipset, 1 intel, Ich7-m overview

IBX-530B-270 Embedded System
Page 16
Support for CRT Hot Plug
3.4 Intel
®
ICH7-M Southbridge Chipset
3.4.1 Intel
®
ICH7-M Overview
The Intel® ICH7-M chipset is connected to the Intel® 945GSE GMCH through the
chip-to-chip Direct Media Interface (DMI). Some of the features of the Intel® ICH7-M are
listed below.
Complies with PCI Express Base Specification, Revision 1.0a
Integrated SATA host controller with DMA operations interfaced to one
external SATA connector on the IBX-530B-N270
Supports the four USB 2.0 devices on the IBX-530B-N270 with four UHCI
controllers and one EHCI controller
Complies with System Management Bus (SMBus) Specification, Version 2.0
Supports Audio Codec ’97 (AC’97) Revision 2.3
Contains Low Pin Count (LPC) interface
Supports Firmware Hub (FWH) interface
Serial peripheral interface support
3.4.2 Intel
®
ICH7-M Low Pin Count (LPC) Interface
The ICH7-M LPC interface complies with the LPC 1.1 specifications. The LPC bus from
the ICH7-M is connected to the following components:
BIOS
chipset
Super I/O chipset
3.4.3 Intel
®
ICH7-M PCIe Bus
The Intel® ICH7-M southbridge chipset has four PCIe lanes. Two of the four PCIe lanes
are interfaced to PCIe GbE controller. A third PCIe lane is interfaced to a PCIe mini
socket.