IEI Integration PCIE-G41A2 - Manual (Page 103)

PCIE-G41A2 PICMG 1.3 CPU card
Page 91
BIOS SETUP UTILITY
Main Advanced PCIPNP Boot Security Chipset Exit
Advanced Chipset Settings
⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯
WARNING: Setting wrong values in below section
may cause system to malfunction.
> Northbridge Configuration
> Southbridge Configuration
Select Screen
↑ ↓ Select
Item
Enter Go to SubScreen
F1 General
Help
F10 Save and Exit
ESC Exit
v02.61 ©Copyright 1985-2006, American Megatrends, Inc.
BIOS Menu 22: Chipset
5.7.1 Northbridge Configuration
Use the Northbridge Chipset Configuration menu (BIOS Menu 23) to configure the
Northbridge chipset.
BIOS SETUP UTILITY
Main Advanced PCIPNP Boot Security Chipset Exit
Northbridge Configuration
⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯
Memory Remap Feature
[Enabled]
PCI MMIO Allocation: 4GB to 3072MB
Memory Hole [Disabled]
Initate Graphic Adapter
[PEG/PCI]
IDG Graphics Mode Select [Enabled, 32MB] Select Screen
↑ ↓ Select
Item
Enter Go to SubScreen
F1 General
Help
F10 Save and Exit
ESC Exit
v02.61 ©Copyright 1985-2006, American Megatrends, Inc.
BIOS Menu 23:Northbridge Chipset Configuration