Analog Devices TigerSHARC ADSP-TS201S - Manual (Page 46)

Rev. C | Page 46 of 48 | December 2006
ADSP-TS201S
ORDERING GUIDE
Model
Temperature
Range
1
1 Represents case temperature.
Instruction
Rate
2
2 The instruction rate is the same as the internal processor core clock (CCLK) rate.
On-Chip
DRAM
Operating Voltage
Package
Option Package
Description
ADSP-TS201SABP-060 –40°C to +85°C 600 MHz 24M bit 1.20 V
DD
, 2.5 V
DD_IO
, 1.6 V
DD_DRAM
BP-576 576-Ball BGA_ED
ADSP-TS201SABP-050 –40°C to +85°C 500 MHz 24M bit 1.05 V
DD
, 2.5 V
DD_IO
, 1.5 V
DD_DRAM
BP-576 576-Ball BGA_ED
ADSP-TS201SYBP-050 –40°C to +105°C 500 MHz 24M bit 1.05 V
DD
, 2.5 V
DD_IO
, 1.5 V
DD_DRAM
BP-576 576-Ball BGA_ED
ADSP-TS201SABPZ060 3
3 Z = Pb-free part.
–40°C to +85°C 600 MHz 24M bit 1.20 V
DD
, 2.5 V
DD_IO
, 1.6 V
DD_DRAM
BP-576 576-Ball BGA_ED
ADSP-TS201SABPZ050 3 –40°C to +85°C 500 MHz 24M bit 1.05 V
DD
, 2.5 V
DD_IO
, 1.5 V
DD_DRAM
BP-576 576-Ball BGA_ED
ADSP-TS201SYBPZ050 3 –40°C to +105°C 500 MHz 24M bit 1.05 V
DD
, 2.5 V
DD_IO
, 1.5 V
DD_DRAM
BP-576 576-Ball BGA_ED