Rainbow Electronics TS81102G0 - Manual (Page 16)

16
TS81102G0
2105C–BDC–11/03
Input Clock Timings
Figure 10. Input Clock
ADC Delay Adjust
Timing Diagram
Figure 11. ADC Delay Adjust Timing Diagram
Clkln Type = 1
DataReady Mode (DR)
Clkln
Data [0..9]
Clkln Type = 0
DataReady/2 Mode (DR/2)
d1 d2 d3 d4 d5
TC2
TFCKIN
TC1
TRCKIN
TSCKIN THCKIN
d1 d2 d3 d4 d5
TC2
TFCKIN
TC1
TRCKIN
TSCKIN THCKIN
TC2ADA
TFIADA
TC1ADA
TRIADA
ADCDelAdjIn
ADCDelAdjOut
TFOADA TROADA
TADA