National Instruments Low-Cost Multifunction I/O Board for ISA Lab-PC+ User Manual

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Index

© National Instruments Corporation

Index-15

Lab-PC+ User Manual

general-purpose timing

connections, 3-24 to 3-28

event-counting application with external

switch gating (figure), 3-25

frequency measurement application

(figure), 3-26

pretrigger timing (figure), 3-23
specifications and ratings, 3-27
timing requirements for GATE and CLK

signals (figure), 3-27

timing I/O circuitry, 4-11 to 4-14

block diagram, 4-12
counter block diagram, 4-14
single-channel interval timing (figure), 4-14
two-channel interval-scanning timing

(figure), 4-13

timing I/O specifications, A-5 to A-6
trigger specifications, A-6
two-channel interval-scanning timing

(figure), 4-13

TWOSCMP bit

description, D-6
returning A/D conversion result, E-4

unipolar input mode

configuration, 2-14
unipolar input signal range versus gain

(table), 4-8

voltage versus A/D conversion values

(table), E-4

unipolar output mode

configuration, 2-10
voltage output versus digital code

(table), E-21

unpacking the Lab-PC+, 1-4

waveform generation operation, E-22 to E-23
WR* signal

description, 3-17
Mode 1 output timing, 3-19
Mode 2 bidirectional timing

, 3-20