National Instruments Low-Cost Multifunction I/O Board for ISA Lab-PC+ - Manual (Page 155)

Appendix D Register Map and Descriptions
© National Instruments Corporation D-39 Lab-PC+ User Manual
Interval Counter Data Register
The Interval Counter Data Register is loaded with the desired number of samples of a single
channel that will be acquired between intervals. See Programming Multiple A/D Conversions in
Single-Channel Interval Acquisition Mode in Appendix E, Register-Level Programming, for a
description of the programming sequence.
Address: Base address + 1E (hex)
Type: Write-only
Word Size: 8-bit
Bit Map:
7 6 5 4 3 2 1 0
D7 D6 D5 D4 D3 D2 D1 D0
Bit Name Description
7-0 D<7..0> Interval Counter count.