Intel D865PCD - Manual (Page 42)

Intel Desktop Board D865PCD Technical Product Specification
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Table 15. PCI Interrupt Routing Map
ICH5 PIRQ Signal Name
PCI Interrupt Source
PIRQA PIRQB PIRQC PIRQD PIRQE PIRQF PIRQG PIRQH
AGP connector INTA INTB
ICH5 USB UHCI controller 1 INTA
SMBus controller INTB
ICH5 USB UHCI controller 2 INTB
AC ’97 ICH5 Audio INTB
ICH5 LAN INTA
ICH5 USB UHCI controller 3 INTC
ICH5 USB UHCI controller 4 INTA
ICH5 USB 2.0 EHCI
controller INTD
PCI bus connector 1 INTD INTA INTB INTC
PCI bus connector 2 INTC INTB INTA INTD
PCI bus connector 3 INTD INTA INTB INTC
✏
NOTE
In PIC mode, the ICH5 can connect each PIRQ line internally to one of the IRQ signals (3, 4, 5, 6,
7, 9, 10, 11, 12, 14, and 15). Typically, a device that does not share a PIRQ line will have a
unique interrupt. However, in certain interrupt-constrained situations, it is possible for two or
more of the PIRQ lines to be connected to the same IRQ signal. Refer to Table 14 for the
allocation of PIRQ lines to IRQ signals in APIC mode.