Intel OCPRF100 MP - Manual (Page 118)

OCPRF100 MP Server System Technical Product Specification
Revision 1.0
111
9. Peripheral Bay Board (Chassis Side)
This chapter describes the design of the peripheral bay board (chassis side). This board, used in
the OCPRF100 MP server system, is attached to the OCPRF100 MP server system chassis and
provides power and signal distribution to the peripheral bay backplane and other system periph-
eral devices.
Features
The OCPRF100 MP server system peripheral bay board has the following features:
• Provides an interface which allows plugging of the peripheral bay into the system.
• Distributes power and signal connections from the midplane and I/O board to the floppy,
IDE CD-ROM, and the peripheral bay backplane.
• Provides a common interface for an integrator's custom peripheral bay solutions.
9.1 Introduction
The peripheral bay board (chassis side) provides power and signal interconnection from the mid-
plane and I/O boards to the peripheral devices and the peripheral bay backplane. This board
allows the single point connection of all power and signals required by the peripheral bay back-
plane. The peripheral bay board (chassis side) contains no active components. Also, it does not
provide or contain any field replaceable unit (FRU) information.
9.2 Mechanical Description
The blind mate is the junction of the peripheral bay board (chassis side) with the peripheral bay
backplane. The peripheral bay backplane meets the peripheral bay board (chassis side) at a 90-
degree angle.
The blind mate consists of one 240-pin connector in between two long guide pins.
9.2.1 Board Layout
Figure 9-1: Peripheral Bay Board (Chassis Side) Layout illustrates the layout of the peripheral
bay board (chassis side) with the connectors.
Figure 9-2 shows the printed circuit board dimensions, mounting holes, and connector place-
ments.