FUJITSU MHW2120BS - Manual (Page 93)

5.2 Logical Interface
5.2.3.5 DMA Setup - Device to Host or Host to Device (Bidirectional)
The DMA Setup - Device to Host or Host to Device FIS has the following layout:
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
9 8 7 6 5 4 3 2 1 0
Reserved (0) Reserved (0) A I D Reserved (0) FIS Type (41h)
0
0 TAG
1
0
2
Reserved (0)
3
DMA Buffer Offset
4
DMA Transfer Count
5
Reserved (0)
6
Figure 5.7 DMA Setup - Device to Host or Host to Device FIS layout
The DMA Setup - Device to Host or Host to Device FIS communicates the start of
a first-party DMA access to the host system. This FIS is used to request the host
system or device to set up the DMA controller before the start of a DMA data
transfer.
A - Auto Active bit. If this bit is cleared ("0" is set for the bit), it indicates that a
DMA Active FIS transfer is required before a Data FIS transfer.
D - Direction bit. If this bit is set ("1" is set for the bit), it indicates that the data
transfer direction is from the device to the host system.
C141-E249 5-19