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FUJITSU MHW2120BS User Manual

Page 188

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Interface

Bit 3:

'1' = Supports the Advanced Power Management feature set.

Bit 2:

'1' = Supports the CFA (Compact Flash Association) feature set.

Bit 1:

'1' = Supports the READ/WRITE DMA QUEUED command.

Bit 0:

'1' = Supports the DOWNLOAD MICROCODE command.

*18 WORD 84

Bit 15:

= 0 The device always returns the fixed value indicated on the left.

Bit 14:

= 1 The device always returns the fixed value indicated on the left.

Bit 13:

'1' = Support the Unload Immediate command.

Bits 12-9 Reserved

Bit 8

'1' = Support the World wide name.

Bit 7

'1' = Support the WRITE DMA QUEUED FUA EXT command.

Bit 6

'1' = Support the WRITE DMA FUA EXT and WRITE

MULTIPLE FUA EXT commands.

Bit 5

‘1’= Support the General Purpose Logging feature.

Bits 4-2 Reserved

Bit 1:

'1' = Supports the SMART SELF-TEST.

Bit 0:

'1' = Supports the SMART Error Logging.

*19 WORD 85

Bit 15:

Undefined.

Bit 14:

'1' = Supports the NOP command.

Bit 13:

'1' = Supports the READ BUFFER command.

Bit 12:

'1' = Supports the WRITE BUFFER command.

Bit 11:

Undefined.

Bit 10:

'1' = Supports the Host Protected Area function.

Bit 9:

'1' = Supports the DEVICE RESET command.

Bit 8:

'1' = Enables the SERVICE interrupt. From the SET FEATURES

command

Bit 7:

'1' = Enables the release interrupt. From the SET FEATURES

command

Bit 6:

'1' = Enables the read cache function. From the SET FEATURES

command

Bit 5:

'1' = Enables the write cache function.

Bit 4:

'1' = Enables the P PACKET command set.

Bit 3:

'1' = Supports the Power Management function.

5-114

C141-E249

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