IDEC FS1A Controller - Manual (Page 137)

5-96
Logic operation function
AND function
As shown in Fig. 5-16 and 5-17, this function reflects the results of a logic (AND) function
processing for multiple inputs (I
n
) in the function output (O
n
).
Fig. 5-16 AND function circuit
I
1
I
2
I
n
O
n
ON
OFF
ON
OFF
ON
OFF
ON
OFF
Fig. 5-17 Operation timing of the AND function
OR function
As shown in Fig. 5-18 and 5-19, this function reflects the results of a logic (OR) function
processing for multiple inputs (I
n
) in the function output (O
n
).
Fig. 5-18 OR function circuit
I
1
I
2
I
n
O
n
ON
OFF
ON
OFF
ON
OFF
ON
OFF
Fig. 5-19 Operation timing of the OR function
I
1
I
2
I
n
O
ｎ
I
1
I
2
I
n
O
ｎ
...
...
...
...
&
>=1