Jtag/multilinx headers, Jtag/boundary scan pinout (j13), Figure 22: top view of jtag/multilinx headers – Sundance SMT398 User Manual
Page 50: Table 10: connector j13-jtag header, See board header pinout in, J13 j12
Version 1.2.0
Page 50 of 52
SMT398 User Manual
JTAG/Multilinx headers
The JTAG/Multilinx headers have the following pinout:
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
CS
RDWR
WS
D0
D1
D3
D7
D4
D5
D6
D2
BUSY
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
RT
TDO
TRIG
TDI
TCK
TMS
3.3V
GND
DONE
RST
D0
PROG
INIT
CCLK
J13
J12
Figure 22: Top View of JTAG/Multilinx headers
JTAG/Boundary scan pinout (J13)
Name Pin Function
Connections
VCC 2 Power.
Supplies VCC (3.3V, 10 mA, typically) to the cable.
To target
system VCC
GND 4 Ground.
Supplies ground reference to the cable.
To target
system
ground
TCK 9 Test
Clock.
This clock drives the test logic for all devices on
boundary-scan chain.
Connect to
system TCK
pin.
TDO 3 Read
Data.
Read back data from the target system is read at this
pin.
Connect to
system TDO
pin.
TDI
7
Test Data In.
This signal is used to transmit serial test instructions
and data.
Connect to
system TDI
pin.
TMS 11
Test
Mode
Select.
This signal is decoded by the TAP controller to control
test operations.
Connect to
system TMS
pin.
Table 10: Connector J13-JTAG Header