Sundance SMT398 - Manual (Page 38)

Version 1.2.0 Page 38 of 52 SMT398 User Manual
Specification Description
V input
Low V
output
Low V input
High V output
High
Maximum voltage 0.8 0.4 3.8
Minimum voltage -0.5 2.0 2.4
Impedance 50 Ohms
Frequency The Frequency limitations are the ones of
the Virtex II part fitted on the SMT398.
Table 4: External clock specification
Constraints file signal Names
BOARDCLK: On-board oscillator input to the FPGA.
EXT_CLK: External clock input to the FPGA.
Power Supplies
The PCI specifications state that the maximum power allowed for any PCI board is 25
Watts, and represents the total power drawn from all power rails provided at the
connector (+5V, +3.3v, +VI/O,+12V,-12V, +3.3Vaux). The expansion board (in our
case the TIM carrier board and the TIM modules) may optionally draw all this power
from either the +5V or +3.3V rail.
Nevertheless, it is anticipated that many systems will not provide a full 25 Watts per
connector for each power rail, because most boards will typically draw much less
than this amount.
For this reason it is recommended that you analyse the total FPGA device power
drawn by using
Xilinx XPOWER before implementing your design in the FPGA.
This will tell you if you need to use the external power connector provided on our
carrier boards. (Like the SMT310Q carrier board)