Sundance SMT398 - Manual (Page 4)

Version 1.2.0 Page 4 of 52 SMT398 User Manual
Constraints File signal Names ........................................................................... 31
SHB ...................................................................................................................... 31
SHB Connector ................................................................................................. 31
SHB Cable Assembly ........................................................................................ 33
SHB Inter Modules solutions ............................................................................. 33
Half Word Interface (16-bit SHB Interface) ........................................................ 33
Constraint File Signal Names ............................................................................ 34
Global bus............................................................................................................. 36
Constraints File Signals Names ........................................................................ 37
Clocks ................................................................................................................... 37
Constraints file signal Names ............................................................................ 38
Power Supplies ..................................................................................................... 38
DC/DC Converter .............................................................................................. 39
Linear Voltage regulator .................................................................................... 40
Fan .................................................................................................................... 40
Power Consumption.............................................................................................. 40
Verification Procedures ............................................................................................ 41
Review Procedures .................................................................................................. 41
Validation Procedures .............................................................................................. 41
FPGA Constraint File general Information ................................................................ 41
Ordering information: ................................................................................................ 43
Full configuration................................................................................................... 43
Basic configuration................................................................................................ 44
Memories........................................................................................................... 44
SHBs ................................................................................................................. 44
Comports........................................................................................................... 44
Global Bus......................................................................................................... 45
External Clock ................................................................................................... 45
PCB Layout Details .................................................................................................. 46
Components placement ........................................................................................ 46
Headers Pinout......................................................................................................... 48
SHB Header.......................................................................................................... 48
SHB Pinout (LVTTL only).(J8-J9-J10-11) .......................................................... 49