Sundance SMT398 - Manual (Page 24)

Version 1.2.0 Page 24 of 52 SMT398 User Manual
Xilinx describe how to connect both download cables at: Parallel cables
Xilinx describe how to configure their devices using these cables at: Configuration
Mode General Information .
For complementary and more detailed information please go to: Xilinx 5 software
Manuals and Help .
See board header pinout in Table 10: Connector J13-JTAG Header
Configuring with MultiLINX
The Mutilinx cable can be used to configure the FPGA via JTAG or SelectMap mode.
See board header pinout in Table 10: Connector J13-JTAG Header , Table 11:
Connector J13-Flying Lead Set #1 and Table 12: Connector J12 Flying Lead Sets
3&4 .
The MultiLINX cable set is a peripheral hardware product from Xilinx.
For additional information on the MultiLINX cable set, go to the following site:
Xilinx MultiLINX cable
FPGA Readback and Partial reconfiguration
Using Comm-port3
Readback and partial reconfiguration are enabled by a specific design for the CPLD,
not provided as a standard feature of the CPLD but that can be purchased from
Sundance. Contrary to the original design, the CPLD is dedicated to control the
FPGA and does not provide a communication channel to user logic residing on the
FPGA anymore. The CPLD is connected to Comport number 3 of the SMT398
connector, which cannot be used anymore by the FPGA to transfer data.
Therefore, the CPLD controller can configure, readback, partially reconfigure the
Virtex II and capture.