Fpga in system programming, Smt398 alone, Smt398 + dsp tim – Sundance SMT398 User Manual
Page 22
Version 1.2.0
Page 22 of 52
SMT398 User Manual
FPGA in system programming
The factory default for the FPGA configuration mode is using Slave SelectMAP mode
and the Comport3.
Configuring the FPGA from Comport 3 allows NOT USING any JTAG cables.
Having a direct link enhances debugging and testing, and therefore reduces the
product’s time to market.
Once the design is complete, the configuration data can be stored on disk and then
loaded each time the system powers up or is reset.
The configuration data can also be downloaded into a DSP TIM module external
memory along with the DSP application. See
The bitstream is presented on Comport3 and the CPLD provides the mechanism to
deliver it quickly to the Virtex-II device using the Slave SelectMAP mode.
Then, the configuration cycle can be transparent to the end user.
After configuration the Comport3 can be available to the FPGA for data transfers if
the Virtex II is XC2V3000 or above and if your CPLD design version allows it. See
SMT398 Alone
Host software can be developed to communicate with the SMT398.
See SMT6025 User Manual on Sundance Web site for more information on how to
develop Host applications for Sundance Hardware.
The host Software application BitstreamLd.exe provided in the SMT6500 package is
compiled for Windows NT/2000/XP.
It allows downloading a bitstream to the SMT398 FPGA by accessing Comport 3 of
the carrier board’s first site.
SMT398 + DSP TIM
The DSP software routines provided are the download functions LoadBitstream() and
FPGAFullConfiguration().
• LoadBitstream():This function reads a bit file from your local HD and stores it
on the DSP board.
• FPGAFullConfiguration(): The FPGA is configured with data from a .bit file
stored on your DSP board.
These functions were developped using 3L Diamond’s high level Comport link
functions and will NOT work under CCStudio. You will have to develop your own
functions to work under CCStudio.