Sundance SMT391-VP - Manual (Page 9)

Version 1.3 Page 9 of 41 SMT391-VP User Manual
The SMT391-VP is made of two sub-modules combined. To make a SMT391-VP
you combine the base module SMT338-VP to the daughter module SMT391.
The SMT391 is responsible for the analogue side of the functionality. The ADC is on
this module. The
user manual of the SMT391 gives all information about the
analogue features of the SMT391 (performances, analogue inputs, …)
The SMT338-VP is responsible for the digital side of the functionality. It implements
the interface to the SMT391 and the communication interfaces used to output the
data. These functionalities are implemented in a Xilinx Virtex-II Pro FPGA
(
XC2VP30-6 in FF896 package).
ADC AT84AD001B
The SMT391-VP is based on the Atmel dual 8-bit 1 Gsps ADC AT84AD001B .
The AT84AD001B provides 1 Gsps sampling per channel or 2 Gsps sampling from
one channel (in the interleaving mode) and integrates dual on-chip track/holds that
provide excellent dynamic performance over 1.5 GHz input frequency bandwidth with
low 1.4 W power consumption.
This Dual ADC is dedicated to high speed, low power applications such as digital
sampling oscilloscopes and direct RF down-conversion.
Refer to Atmel website for the details of this ADC.
Analogue features
The description of the analogue features of the SMT391-VP is available in the user
manual of the SMT391 .
FPGA
The SMT391-VP is populated with a Xilinx Virtex-II Pro FPGA ( XC2VP30-6 in FF896
package).
The digital data coming from the ADC is sent to the FPGA. The FPGA is used to
implement various communication interfaces. It implements the interface to the
daughter module SMT391.
It also implements the RSL and SDB communication interfaces used to send the data
out of the module as well as the comport communication interface used to control the
module. The FPGA also implement the interface to the on-board DDR SDRAM.
DDR SDRAM
The DDR SDRAM is not supported by the SMT391-VP.