Measurement Computing PCI-DAS6071 - Manual (Page 29)

PCI-DAS6071 User's Guide Functional Details
29
Figure 31 shows the timing requirements for the D/A EXTERNAL TIME BASE signal.
Figure 31. D/A EXTERNAL TIME BASE signal timing
General-purpose counter signal timing
The general-purpose counter signals are:
 CTR1 CLK
 CTR1 GATE
 CTR1 OUT
 CTR2 CLK
 CTR2 GATE
 CTR2 OUT
CTR1 CLK signal
The CTR1 CLK signal can serve as the clock source for independent user counter 1. It can be selected through
software at the CTR1 CLK pin rather than using the on-board 10 MHz or 100 kHz sources. It is also polarity
programmable. The maximum input frequency is 10 MHz. There is no minimum frequency specified.
Figure 32 shows the timing requirements for the CTR1 CLK signal.
Figure 32. CTR1 CLK signal timing