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Daq signal timing, Scanclk signal, Startscan signal – Measurement Computing PCI-DAS6071 User Manual

Page 18: Signal timing

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PCI-DAS6071 User's Guide

Functional Details

18

DAQ signal timing

The DAQ timing signals are:

 SCANCLK
 A/D START TRIGGER
 A/D STOP TRIGGER
 STARTSCAN
 SSH
 A/D CONVERT
 A/D PACER GATE
 A/D EXTERNAL TIME BASE
 A/D STOP
 ATRIG

SCANCLK signal

SCANCLK is an output signal that may be used for switching external multiplexers. It is a 400 ns wide pulse
that follows the CONVERT signal after a 50 ns delay. This is adequate time for the analog input signal to be
acquired so that the next signal may be switched in. The polarity of the SCANCLK signal is programmable. The
default output pin for the SCANCLK signal is AUXOUT2, but any of the AUXOUT pins may be programmed
as a SCANCLK output.

Figure 5. SCANCLK signal timing

STARTSCAN signal

The STARTSCAN output signal indicates when a scan of channels has been initiated. You can program this
signal to be available at any of the AUXOUT pins. The STARTSCAN output signal is a 50 ns wide pulse the
leading edge of which indicates the start of a channel scan. Figure 6 shows the timing for the STARTSCAN
signal.

Figure 6. STARTSCAN start of scan timing