DFI AM636-B User Manual
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81
3
BIOS Setup
PCI Latency Timer (Per 8CLK)
This feature is used to select the length of time each PCI device will control the
bus before another takes over. The larger the value, the longer the PCI device
can retain control of the bus. Since each access to the bus comes with an initial
delay before any transaction can be made, low values for the PCI Latency Timer
will reduce the effectiveness of the PCI bandwidth while higher values will im-
prove it.
INT Pin 1 Assignment to INT Pin 8 Assignment
By default, a device is automatically assigned to each INT. You can also manually
assign an INT for each device.
Maximum Payload Size
This field is used to select the maximum TLP payload size of the PCI Express de-
vices. The unit is byte.
See also other documents in the category DFI Motherboard:
- AR100-DR (112 pages)
- G7B630-N (127 pages)
- G7B630-N (154 pages)
- BT100 (71 pages)
- HR100-CRM (170 pages)
- BT103 (72 pages)
- BT161 (71 pages)
- CM100-C (70 pages)
- CD101-N (69 pages)
- CD102 Series (76 pages)
- CP100-NRM (150 pages)
- CR101-D (67 pages)
- CR100-CRM (177 pages)
- EL339-B (109 pages)
- G5C100-NR (160 pages)
- HD100-H81 (79 pages)
- HD101-H81 (83 pages)
- HD173-H81 (70 pages)
- HM100-QM87 (97 pages)
- HM103-QM87 (99 pages)
- HU103 (95 pages)
- KB161 (68 pages)
- HU173 (90 pages)
- LR100-N18M/N18S (126 pages)
- LR102-B18M (138 pages)
- EL630-NR (149 pages)
- NP101-D16C (150 pages)
- SB102-D (60 pages)
- NP102-N16C (144 pages)
- MB630-CRM (171 pages)
- SB630-CRM (184 pages)
- SB630-CRM (183 pages)
- SR100-L20C (144 pages)
- SR100-N (152 pages)
- LT600-L (149 pages)
- G7B630-N (147 pages)
- CA331-P (131 pages)
- EL330-DR (142 pages)
- CP337-NRM (174 pages)
- HD310-Q87 (101 pages)
- EL620-C (192 pages)
- G7L630-B (133 pages)
- HD330-H81 (81 pages)
- HD330-Q87 (85 pages)
- HD332-H81 (76 pages)