Artesyn NITX-315/NITX-315-ET Installation and Use (August 2014) - Manual (Page 66)

Functional Description
NITX-315/NITX-315-ET Installation and Use (6806800L71D) 66
4.13 Video Interface
TNC supports two types of display output: SDVO and LVDS. For SDVO application, NITX-
315/NITX-315-ET uses a transfer solution CH7317A-BF to provide the SDVO to VGA usage.
The LVDS interface supports pixel color depths of 18 and 24 bits and a maximum resolution of
up to 1280x768 at 60Hz. Minimum pixel clock is 19.75MHz while the maximum pixel clock rate
is up to 80MHz.
The standard BIOS supports SDVO VGA out and LVDS output.
4.14 Audio Interface
TNC can support a high definition audio interface. An Audio Codec is applied to the HDA link
for NITX-315/NITX-315-ET and one line-in and line-out port jacks are mounted in the back IO
panel. A header P12 for the front panel audio output is provided. See
Table 3-10 on page 47 .
4.15 TPM Interface
The LPC is routed to a header P8 which is targeted for TPM application.
4.16 BIOS Device
The SPI Flash is used as a BIOS device. The SPI BIOS chip capacity is 4 MB.
NITX-315/NITX-315-ET also provides an SF100 onboard SPI flash program function. When this
feature is used, the input power should be cut fully to avoid damage to the chipset. See
Table
3-12 on page 48 .
4.17 GPIO Configuration
There are three parts of GPIO in NITX-315/NITX-315-ET, one is a user define GPIO which is
generated from PCA9557PW. The second part GPIO is coming from the TNC and the 3rd part
GPIO is derived from Topcliff.