Artesyn MITX-430/MITX-440-DVI-2E Installation and Use (August 2014) - Manual (Page 66)

Functional Description
MITX-430/MITX-440-DVI-2E Installation and Use (6806800K37D) 66
GPIO24 I/O 3.3V Resume GPO Multiplexed with
MEM_LED Unused, connect to a
TP
GPIO25
Desktop
only I/O 3.3V Resume Native This GPIO is not
implemented and is
used instead
as STP_CPU# Used as STP_CPU#
GPIO26 I/O 3.3V Resume Native Multiplexed with
S4_STATE# Unused, PD GND
GPIO27 I/O 3.3V Resume GPO ICH8 Base:
Unmultiplexed Used as Mini-PCIE
Disable signal, Low
active
GPIO28 I/O 3.3V Resume GPO ICH8 Base:
Unmultiplexed Used as LAN2 disable
signal, Low active
GPIO29 I/O 3.3V Resume Native Multiplexed with
OC5# Used as USB OC func,
associated with USB4
USB5
GPIO30 I/O 3.3V Resume Native Multiplexed with
OC6# Used as USB OC func,
associated with USB6
USB7
GPIO31 I/O 3.3V Resume Native Multiplexed with
OC7# Used as USB OC func,
associated with USB6
USB7
GPIO32
Desktop
only I/O 3.3V Core GPO This GPIO is not
implemented and is
used instead
as CLKRUN# Used as CLKRUN#
GPIO33 I/O 3.3V Core GPO Multiplexed with
HDA_DOCK_EN# Unused, low active
GPIO34 I/O 3.3V Core GPO Multiplexed with
HDA_DOCK_RST# Used as LVDS/DVI
display selection
1 = DVI; 0 = LVDS
GPIO35 I/O 3.3V Core GPO Multiplexed with
SATACLKREQ# Used as SATA clock
request
Table 4-3 ICH8-M GPIO Definition (continued)
Name Type Tolerance
Power
Well
Default Signal Description Implementation