Artesyn MITX-430/MITX-440-DVI-2E Installation and Use (August 2014) - Manual (Page 65)

Functional Description
MITX-430/MITX-440-DVI-2E Installation and Use (6806800K37D) 65
GPIO12 I/O 3.3V Resume Native Natively used as
GLAN_DOCK# Used as LAN_DISABLE#
signal, output low
active
GPIO13 I/O 3.3V Resume Native Natively used as
ENERGY_DETECT Unused, PU
VCC3V3DUAL
GPIO14 I/O 3.3V Resume GPI Multiplexed with
AC_PRESENT Unused, PU
VCC3V3DUAL
GPIO15
Desktop
only I/O 3.3V Resume Native GPIO is not
implemented
and is used instead
as
STP_PCI#. Used as STP_PCI#
GPIO16 I/O 3.3V Core Native Natively used as
DPRSLPVR. Used as DPRSLPVR
GPIO17 I/O 3.3V Core GPI Multiplexed with
TACH0 Used as DVI detect
GPIO18 I/O 3.3V Core GPO Unmultiplexed Used as LVDS backlight
type selection
1 = DC mode; 0 = PWM
mode
GPIO19 I/O 3.3V Core GPI Multiplexed with
SATA1GP Unused, PD GND
GPIO20 I/O 3.3V Core GPO Unmultiplexed Unused, connect to a
TP/used as a strap pin
GPIO21 I/O 3.3V Core GPI Multiplexed with
SATA0GP. Unused, PD GND
GPIO22 I/O 3.3V Core GPI Multiplexed with
SCLOCK Unused, PU VCC3V3
GPIO23 I/O 3.3V Core Native Multiplexed with
LDRQ1# By default unused,
optionally used as
LPC_DRQ1#,
connecting to TPM
connector
Table 4-3 ICH8-M GPIO Definition (continued)
Name Type Tolerance
Power
Well
Default Signal Description Implementation