Reset state – Altera SerialLite II Protocol User Manual
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Altera Corporation
SerialLite II Protocol Reference Manual
Physical Layer Description
Figure 2–13. Acknowledging Link Training State Machine
Reset State
The reset state is the first state of the lane initialization state machine. It
can be entered at any time by a power-on reset, hardware reset, or link
error. The transmitter is disabled and its outputs are driven into a
quiescent state (zero-volt differential). The received is initialized.
The receiver discards all received data and flushes any data in progress.
All state machines and registers are set to their initialization values. All
counters, timers, pointers, and expected segment ID for transmission of
priority packets are reset. The link-up status is cleared to indicate the link
is down.
Lane Alignment
Reset
Character Alignment
Acknow ledge
Character Alignment
Acknow ledge
Lane Alignment
Link-Up
Pow er-On Reset
or Hardw are Reset
Link Error
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