Altera Arria II GX FPGA - Manual (Page 24)

6–4 Chapter 6: Board Test System
Using the Board Test System
Arria II GX FPGA Development Kit User Guide February 2011 Altera Corporation
Using the Board Test System
This section describes each control in the Board Test System application.
The Configure Menu
Each test design tests different functionality and corresponds to one or more
application tabs. Use the Configure menu to select the design you want to use.
Figure 6–2 shows the Configure menu.
To configure the FPGA with a test system design, follow these steps:
1. On the Configure menu, click the configure command that corresponds to the
functionality you wish to test.
2. In the dialog box that appears, click Configure to download the corresponding
design’s SRAM Object File (.sof) to the FPGA. The download process usually takes
about a minute.
3. When configuration finishes, click Close to complete the configuration process
and run the design in the FPGA. A corresponding application tab appears in the
GUI that interfaces with the design in the FPGA.
The Config Tab
The Config tab shows information about the board’s current configuration.
Figure 6–1 on page 6–2 shows the Config tab. The tab displays the contents of the
MAX II registers, the MAX II code version, the JTAG chain, the board’s MAC address,
and the flash memory map.
The following sections describe the controls on the Config tab.
Figure 6–2. The Configure Menu