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Digilent DIO5 User Manual

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DIO5 Reference Manual

Digilent, Inc.

www.digilentinc.com

Page

16

Copyright Digilent, Inc. All rights reserved. Other product and company names mentioned may be trademarks of their respective owners.

Appendix 1. Default CPLD configuration


------------------------------------------------------------------------
-- DlabDio5.vhd -- Digilab DIO5 Default CPLD Configuration
------------------------------------------------------------------------
-- Author: Clint Cole
-- Copyright 2003 Digilent, Inc.
------------------------------------------------------------------------
-- This module contains the default configuration for the DIO5 XCR3128XL
-- CoolRunner CPLD. This project implements a bus-oriented, register-based
-- interface that can be used by a system board to interact with the DIO5
-- board. The 16 push buttons, 8 switches, 4 digit seven segment display, and
-- 16 discrete led's are accessed via the CPLD according to the memory map:
-- address read write
-- 000 BtnLo LedLo
-- 001 BtnHi LedHi
-- 010 Swt SsegLo
-- 010 - SsegHi
--
-- The sixteen buttons on the DIO5 are arranged as a decimal keypad and
-- six directly-connected function buttons. All buttons are routed through
-- the CPLD and are readable via the bus interface. Additionally, Buttons 0-9
-- are encoded to BCD by the CPLD logic. The remaining six buttons pass
-- through the CPLD and connect directly to the system board interface
-- connectors. All buttons are debounced by latches driven by the
-- input clock (signal LCLK).
--
-- The eight slide switches bypass the CPLD and connect directly
-- to the interface connectors, and they also pass through the CPLD to allow
-- reading via the bus interface.
--
-- The LCD display signals pass through the CPLD to provide logic level
-- conversion from the 5V logic levels of the LCD display to the 3.3V
-- logic levels used by system boards.
--
-- The VGA signals on the DIO5 board go directly to the connectors and are
-- not connected to the CPLD.
--
-- The keyboard signals pass through the CPLD to provide logic level
-- shifting. The standard implementation provides an input only keyboard
-- and does not support writing to the keyboard.
--
------------------------------------------------------------------------
-- Revision History:
-- 08/20/2003(ClintC): created
------------------------------------------------------------------------

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity DlabDio5 is
Port ( db : inout std_logic_vector(7 downto 0);
adr : in std_logic_vector(5 downto 0);
lclk : in std_logic;
cs : in std_logic;
we : in std_logic;
oe : in std_logic;
lcen : in std_logic;
rgbLcd : inout std_logic_vector(7 downto 0);
lcden : out std_logic;
lcdrw : out std_logic;
lcdrs : out std_logic;
rgbBtnIn : in std_logic_vector(15 downto 0);