Achronix Speedster22i sBus - Manual (Page 19)

UG047, October 24, 2013 19
before a specific action, you must also consider latencies in the design to ensure that the
delay from the slowest sBus link is acceptable for the application.
Multiple Masters for a Single/Multiple Slave(s) Implementation
You can treat the multiple masters for a single/multiple slave implementation as an extension
of the Single Master for Single Slave Implementation and/or a Single Master for Multiple
Slaves Implementation because the multiple masters can be implemented as a single master
controller with multiple user sources.
Design Considerations
You must include additional inputs to accept, and outputs to provide the user information
from and to the fabric side respectively. You must include logic in the controller to select the
appropriate inputs for writes and present it to the sBus interface for which the write request
is intended. When you have multiple slaves in the design, the controller should have the
logic to select the correct slave interface for the sBus channel from the supported set of such
interfaces. Similar actions must be taken by the master controller to read the requested slave
register and provide the information to the requester.
You must include some arbitration logic in the controller to ensure that each requesting
source is serviced within the acceptable constraints of the required application. Discussions
of such constraints are beyond the scope of this guide. Please contact Achronix for support as
needed.