Achronix Speedster22i sBus - Manual (Page 17)

UG047, October 24, 2013 17
Chapter 4
– sBus Master Implementation
In this chapter, you will learn the following about the sBus serial bus:
Single Master for Single Slave Implementation
Single Master for Multiple Slaves Implementation
Multiple Masters for a Single/Multiple Slave(s) Implementation
The sBus design consists primarily of defining and implementing the master control block in
the HD1000 FPGA fabric. As discussed in the
Master Interface section, you have a lot of
flexibility to implement the master, based on your needs, and the slave interface of the IP for
which you need the master. Discussing all the options is beyond the scope of this guide. The
following sections highlight a few typical examples. For your specific needs, contact
Achronix.
Single Master for Single Slave Implementation
You can use a single sBus master to communicate with a single sBus slave on a hardened IP
such as a PLL on the HD1000, which has several independent PLLs on board. You can get
more information about the slave interface for the specific IP from the relevant User Guide. In
this case, the master must have the following specifications.
Master Specifications for PLL sBus Controller

32-bit data width (the slave will only use the lower 8-bits so there is room for design
simplification)

8 pins to drive the PLL sBus slave interface

Pins to receive the register programming information from the user on the fabric side

Pins to provide register/status information to the user on the fabric side
Master Actions for PLL sBus Controller
Read Operation
1. Receive information from the user for the read request on the fabric side.
2. Drive the read actions on the sBus as explained for 32-bit reads in 32-bit Data-width
Mode.
3. Monitor the o_sbus_ack signal to accept the serial data from the PLL sBus slave.
Note: You can simplify your design to accept only the lower 8-bits of data.
4. Latch the serial data and provide it to the user on the fabric side.
Write Operation
1. Receive information from the user for the write request on the fabric side.
2. Drive the write actions on the sBus as explained for 32-bit writes in 32-bit Data-width
Mode.