Achronix Speedster22i Interlaken - Manual (Page 37)

0x0110 txrlimintv
TX Rate Limiter Update Interval Register – R/W
Bits 7:0 specify the interval, in Local bus clock cycles, that the token
bucket will be updated. It is recommended that this value be greater
than or equal to 8. This value should not be changed when the rate
limiter is enabled. (ctl_tx_rlim_intv)
0x011C txmubits
TX Multi-Use Bits Register – R/W
Bits 7:0 Specify a value contained in bits 31-24 of subsequent Control
Words generated by the TX. (ctl_tx_mubits)
0x0140 txcallen
TX Flow Control Calendar Length Register – R/W
Bits 3:0 Specify the number of bits of in-band flow-control that are
actually used. The settings are as follows: if LEN = 0, then calendar
length = 16; if LEN = 1, then calendar length = 32; if LEN = 3, then
calendar length = 64; if LEN = 7, then calendar length = 128; if LEN =
15, then calendar length = 256; All other values are reserved.
(ctl_tx_fc_callen)
0x0144 txmframelen
TX Meta Frame Length Register – R/W
Bits 15:0 should be set to -1 the desired length. Thus for a Meta Frame
of 2048, a value of 2047 should be used. This input is specified in
terms of the number of words or cycles minus one. For example, if set
to 2047, then a Metaframe sync word is sent every 2048 word
transfers on every lane. See section 5.4.3 of Interlaken spec 1.1.
0x0146 txskip
TX Skip Word Disable Register – R/W
Bit 0 – if set to a value of 1 will disable the generation of a skip word
after the scrambler state word.
0x0148 txburst
TX Burst Parameters Register – R/W
Bits 1:0 Specifies the maximum number of Data Words between Burst
Control Words. See section 5.3.2 of Interlaken spec 1.1. The following
values are defined: 00=64 bytes, 01=128 bytes, 10=192 bytes, 11=256
bytes. (ctl_tx_burstmax)
Bits 10:8 Specifies the minimum spacing between Burst Control
Words. The values are defined as follows: 000=32 bytes, 001=64 bytes,
010=96 bytes, etc. (ctl_tx_burstshort)
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