Achronix Speedster22i Interlaken User Manual
Page 19

Name
Direction
Clock
Description
tx_eopin are sampled as 1.
When tx_eopin and tx_errin are sampled as
1, the value of tx_mtyin[2:0] is ignored as if
it was 000. The other bits of tx_mtyin are
used as usual.
tx_bctlin
Input
clk
Transmit force insertion of Burst Control
word. This input is used to force the
insertion of a Burst Control Word. When
tx_bctlin and tx_enainare sampled as 1, a
Burst Control word is inserted before the
data on the tx_datain bus is transmitted
even if one is not required to observe the
ctl_tx_burstmax parameter.
This input is intended to be used by
external schedulers that wish to reduce
bandwidth lost due to observation of the
ctl_tx_burstshort parameter (see the
Use of
tx_bctlin
section for more details).
Use of this input is not a requirement for
correct IIPC operation.
LBUS Interface – TX Path Control/Status Signals
ctl_tx_fc_stat[255:0]
Input
clk
TX In-Band Flow Control Input. These
signals are used to set the status for each
calendar position in the in-band-flow
control mechanism (see Interlaken Protocol
Definition). A value of 1 means XON, a
value of 0 means XOFF.
These bits are transmitted in the Interlaken
Control Word bits [55:48].
stat_tx_overflow_er
r
Output
clk
Tx overflow. This output should never be
asserted. It indicates a critical failure and
should be fixed.
stat_tx_underflow_e
rr
Output
clk
TX Underflow. This signal indicates if the
LBUS interface is being clocked too slowly
to properly fill the link with data.
In normal operation, this signal will always
be sampled as 0.
If this signal is sampled as 1, the clocks are
not set to proper frequencies and must be
fixed.
stat_tx_burst_err
Output
clk
TX BurstShort Error. When this signal is a
value of 1, a burst (i.e. a sequence of Data
UG032, May 15, 2014
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