beautypg.com

Rockwell Automation 61C542 Voltage Input module User Manual

Page 30

background image

4Ć12

Bit 7 defines whether or not square root extraction is enabled for the

channel specified in register 23. The default condition (0) disables

square root extraction. When square root extraction is enabled, you

must be in unipolar mode. The square root function provides flow

information directly from a differential pressure input.
If the specified channel has square root extraction enabled and does

not use engineering units, the flow information provided is in the

range of 0 to +4095. The data returned represents the following ratio:

Data

Flow

4095

=

Flow (Maximum)

Set the Maximum Scaling Register (register 24) to 10000 in order to

read the flow information in steps of 0.01%:

Data

Flow

10000

=

Flow (Maximum)

You can also set register 24 to the maximum flow value. This will allow

a direct indication of flow.
Bit 8 defines whether the channel specified in the channel number

register (register 23) is a singleĆended channel or is the first channel

of a differential pair. The default is (0), which represents a

singleĆended channel. Note that when you are changing between the

differential and singleĆended modes of operation, you must first reset

the channel's configuration.
Bit 9 defines whether the channel specified in the channel number

register (register 23) is to be treated as bipolar (-10V to 10V range) or

unipolar (0 to +10V range). The default is (0) which represents bipolar.
Bits 10 and 11 are reserved for future use.
Bits 12 to 15, when equal to 0, enable the READY state, which is the

default condition. When the module is in the READY state, it is ready

to receive a configuration command.
When bits 12 to 15 are set to a binary value of 1, 2, or 3, their

operations refer to the channel specified in register 23:
D A binary value of 1 (RESET) resets the channel's configuration by

clearing its corresponding channel input register and resetting its

corresponding bit in the status registers (registers 16Ć21). When

resetting a differential pair, register 23 must contain the first (even

number) channel of the pair, otherwise, a channel number error"

configuration error will result.

D A binary value of 2 (READ) reads the channel's current

configuration information in memory and loads it into registers 24

to 30. When reading a differential pair, register 23 must contain the

first (even number) channel of the pair, otherwise, a channel

number error" configuration error will result.

D A binary value of 3 (WRITE) transfers the channel's configuration

information (registers 24 to 30) into the module's memory,

configures the channel, and then sets the corresponding bits in

the status registers (registers 16Ć21). If bit 8 is set to 1 (indicating a

differential pair), then register 23 must be the first (even number)

channel of the pair, otherwise, a channel number error"

configuration error will result.

When bits 12 to 15 are set to a binary value of 4 or 5, they reflect the

AĆC power line frequency. The default is 60 Hz.