Cirrus Logic CDB53L30 - Manual (Page 3)

3 DS963DB1
CDB53L30
1 The CDB53L30 System Overview
1 The CDB53L30 System Overview
The CDB53L30 evaluation board is a convenient platform for evaluating the CS53L30 low-power, quad-channel
microphone ADC with TDM output. It supports multiple power supply and signal I/O configurations, including the option to
connect directly to the CS53L30 from an external system such as a host processor (while bypassing the onboard control
circuitry). The CDB53L30 has two CS53L30 devices, providing the ability to evaluate the multichip synchronization
protocol. To evaluate the synchronization protocol using four devices, two CDB53L30s can be linked using the SYNC I/O
header. The CDB53L30 also serves as the component and layout reference for the CS53L30.
The following subsections describe the features of the CDB53L30 evaluation board in detail.
1.1 Power Supply Circuitry
The CDB53L30 requires a +5-V power source, supplied either by a +5-V external DC power supply connected to the +5V_
EXT and GND binding posts, or by the VBUS connection from a powered USB port. The +5-V source is selectable via
jumper pin block J31.
Low-dropout regulators (LDOs) step down the +5-V supply to provide clean and stable +3.3-, +3.6-, and +1.8-V rails to all
the onboard circuitry and the CS53L30. Jumper pin block J2 selects the VA power supply source for the CS53L30 supply
pins (either the VA_EXT binding post or the onboard +1.8-V LDO). Jumper pin block J13 selects the VP power supply
source for the CS53L30 supply pins (either the VP_EXT binding post or the onboard +3.6-V LDO).
1.2 Analog Inputs
The CDB53L30 has eight analog input connectors, four per CS53L30 device. The four 1/8” TRS jacks labeled “1.AIN1,"
“1.AIN2," “1.AIN3," and “1.AIN4” are connected to analog inputs 1–4, respectively, of device #1. The four 1/8” TRS jacks
labeled “2.AIN1," “2.AIN2," “2.AIN3," and “2.AIN4” are connected to analog inputs 1–4, respectively, of device #2.
For fully differential input sources, no jumper should be placed at the position marked “IN–” at the Sleeve/AIN– jumper pin
block (J36 on channel 1.AIN1). For single-ended or pseudodifferential input sources, AIN– should be shunted to ground
by placing a jumper at the “IN–” position (Pins 1 and 2).
In addition to the 1/8” TRS jacks, the input source may also be connected directly to the input header (J6 on channel
1.AIN1). The AIN+ and AIN– pins are connected directly to the “tip” and “ring” conductors of the 1/8” TRS jack,
respectively.
By factory default, the sleeve conductor of the TRS cable is shunted to ground by the jumper at the position labeled
“Sleeve”. When using a fully differential input source, it may be desirable for noise reasons to float the sleeve connection
by removing the “Sleeve” jumper. In some cases, this can reduce noise induced by ground loops.
For microphone applications, the CS53L30 microphone bias signals are available at the input headers. Bias can also be
connected to the AIN+ inputs through 1.8-k
 series bias resistors according to the instructions below:
1. For two-pin microphones (bias connected to AIN+ through a bias resistor): the “Bias to AIN+” jumper should be
shunted and the “Rbias SHORT” jumper should be open.
2. For three-pin microphones (bias not connected to AIN+): the “Bias to AIN+” jumper should be open and the “Rbias
SHORT” jumper should be shunted.
DC blocking capacitors are located between the AIN+/AIN– input connectors and the CS53L30 IN± input pins. These caps
are 0.1
F, providing a typical –3-dB corner frequency of 31.8 Hz when the microphone preamplifier is bypassed (50 k
input impedance) or 1.6 Hz when the the preamplifier is enabled (1-M
input impedance).
1.3 Digital Mic Inputs
The CS53L30 can be configured to accept digital microphone inputs on channels 1 and 3. The digital microphone signals
should be connected directly to the input header (J6 on input 1.AIN1) as described in
Table 1-1 .