4 synchronization, 5 system configuration, 6 digital filter operation – Cirrus Logic CS5378 User Manual
Page 19: 7 data collection, 8 integrated peripherals, Synchronization, System configuration, Digital filter operation, Data collection, Integrated peripherals
CS5378
DS639F3
19
3.4 Synchronization
Digital filter phase and analog sample timing of the
ΔΣ modulator connected to the CS5378 are syn-
chronized by a rising edge on the SYNC pin. If a
synchronization signal is received identically by all
CS5378 devices in a measurement network, syn-
chronous sampling across the network is guaran-
teed.
3.5 System Configuration
Through the serial configuration interface, filter
coefficients and digital filter register settings can
either be programmed by a microcontroller or auto-
matically loaded from an external EEPROM after
reset. System configuration is only required for the
CS5378 device, as other devices are configured via
the CS5378 General Purpose I/O pins.
Two registers in the digital filter, SYSTEM1 and
SYSTEM2 (0x2C, 0x2D), are provided for user de-
fined system information. These are general pur-
pose registers that will hold any 24-bit data values
written to them.
3.6 Digital Filter Operation
After analog to digital conversion occurs in the
modulator, the oversampled 1-bit
ΔΣ data is read
into the CS5378 through the MDATA pin. The dig-
ital filter then processes data through the enabled
filter stages, decimating it to 24-bit words at a pro-
grammed output word rate. The final 24-bit sam-
ples are concatenated with 8-bit status words and
placed into an output FIFO.
3.7 Data Collection
Data is collected from the CS5378 through the se-
rial data interface. When data is available, serial
transactions are automatically initiated to transfer
24-bit data or 32-bit status+data from the output
FIFO to the system telemetry. The output FIFO has
eight data locations to permit latency in data collec-
tion.
3.8 Integrated peripherals
Test Bit Stream (TBS)
A digital signal generator built into the CS5378
produces a 1-bit
ΔΣ sine wave. This digital test bit
stream is connected to the CS5373A test DAC to
create high quality analog test signals or internally
looped back to the CS5378 MDATA input to test
the digital filter and data collection circuitry.
Time Break
Timing information is recorded during data collec-
tion by strobing the TIMEB pin. A dedicated flag
in the sample status bits, TB, is set high to indicate
during which measurement the timing event oc-
curred.
General Purpose I/O (GPIO)
Eight general purpose pins are available on the
CS5378 for system control. Each pin can be set as
input or output, high or low, with an internal pull-
up enabled or disabled. The CS3301A/02A and
CS5373A devices in Figure 9 are configured by
simple pin settings controlled through the CS5378
GPIO pins.