IEI Integration ICE-945GSE v1.11 - Manual (Page 28)

ICE-945GSE COM Express Type 2 Module
Page 16
2.5.3 Low Pin Count (LPC) Interface
The Intel® ICH7M LPC interface complies with the LPC 1.1 specifications. The LPC bus
from the Intel® ICH7M can be connected to the following devices:
Super I/O chipset
COM port chipset
2.5.4 PCI Bus
The PCI interface on the Intel® ICH7M is compliant with the PCI Revision 2.3
implementation. Some of the features of the PCI interface are listed below.
PCI Revision 2.3 compliant
33 MHz
5 V tolerant PCI signals (except PME#)
Integrated PCI arbiter supports up to seven PCI bus masters
2.5.5 PCIe Bus
The Intel® ICH7M Southbridge chipset has four PCIe lanes. These PCIe lanes are
connected to PCIe x1 devices.
2.5.6 GbE Ethernet
The ICE-945GSE provides a Gigabit Ethernet connection through the Intel® 82541PI chip
connected to the LAN connector on the Intel® ICH7M.
2.5.7 Real Time Clock
The real time clock in integrated in the Intel® ICH7M. The RTC operates on a 3 V battery
and 32.768 KHz crystal. The RTC keeps track of the time and stores system data even
when the system is turned off.
2.5.8 SATA Controller
The integrated SATA controller on the Southbridge supports up to two SATA drives with
independent DMA operations.