Rainbow Electronics AT89LP216 - Manual (Page 53)

53
3621A–MICRO–6/06
AT89LP216 [Preliminary]
Figure 18-2. SPI Shift Register Diagram
Figure 18-3. SPI Block Diagram
2:1
MUX
2:1
MUX
Serial Master Serial Slave
LATCH
D Q
CLK
LATCH
D Q
CLK
LATCH
D Q
CLK
LATCH
D Q
CLK
Parallel Slave
(Read Buffer)
Parallel Master
(Write Buffer)
Serial Out
Receive
Byte
Serial In
Transmit
Byte
8 8
8
8
7
8
Oscillator
8-bit Shift Register
Read Data Buffer
Pin Control Logic
SPI Control
SPI Status Register
SPI Interrupt
Request
Internal
Data Bus
Select
SPI Clock (Mater)
Divider
ч4ч8ч32ч64
SPI Control Register
8
8
8
S
PIF
WCOL
S
PR1
MSTR
S
PIE
Clock
Logic
Clock
MSB
S
M
S
PE
DORD M
S
TR
CPOL CPHA S
PR1
S
PR0
M
S
TR
S
PE
DORD
LSB
S
M
M
S
MISO
P1.6
MOSI
P1.5
SCK
1.7
SS
P1.4
S
PR0
SPE
Write Data Buffer