Rainbow Electronics T5761 - Manual (Page 13)

13
T5760/T5761
4561B–RKE–10/02
Duration of the Bit Check If no transmitter signal is present during the bit check, the output of the ASK/FSK
demodulator delivers random signals. The bit check is a statistical process and T
Bit-check
varies for each check. Therefore, an average value for T
Bit-check
is given in the electrical
characteristics. T
Bit-check
depends on the selected baud-rate range and on T
Clk
. A higher
baud-rate range causes a lower value for T
Bit-check
resulting in a lower current consump-
tion in polling mode.
In the presence of a valid transmitter signal, T
Bit-check
is dependent on the frequency of
that signal, f
Sig
, and the count of the checked bits, N
Bit-check
. A higher value for N
Bit-check
thereby results in a longer period for T
Bit-check
requiring a higher value for the transmitter
pre-burst T
Preburst
.
Receiving Mode If the bit check was successful for all bits specified by N
Bit-check
, the receiver switches to
receiving mode. According to Figure 9, the internal data signal is switched to Pin
DATA in that case and the data clock is available after the start bit has been detected
(see Figure 20). A connected microcontroller can be woken up by the negative edge at
Pin DATA or by the data clock at Pin DATA_CLK. The receiver stays in that condition
until it is switched back to polling mode explicitly.
Digital Signal Processing The data from the ASK/FSK demodulator (Dem_out) is digitally processed in different
ways and as a result converted into the output signal data. This processing depends on
the selected baud-rate range (BR_Range). Figure 14 illustrates how Dem_out is syn-
chronized by the extended clock cycle T
XClk
. This clock is also used for the bit-check
counter. Data can change its state only after T
XClk
has elapsed. The edge-to-edge time
period t
ee
of the Data signal as a result is always an integral multiple of T
XClk
.
The minimum time period between two edges of the data signal is limited to
t
ee
³
T
DATA_min
. This implies an efficient suppression of spikes at the DATA output. At the
same time it limits the maximum frequency of edges at DATA. This eases the interrupt
handling of a connected microcontroller.
The maximum time period for DATA to stay Low is limited to T
DATA_L_max
. This function is
employed to ensure a finite response time in programming or switching off the receiver
via Pin DATA. T
DATA_L_max
is thereby longer than the maximum time period indicated by
the transmitter data stream. Figure 16 gives an example where Dem_out remains Low
after the receiver has switched to receiving mode.
Figure 14. Synchronization of the Demodulator Output
Clock bit-check
counter
Data_out (DATA)
T
XClk
Dem_out
t
ee