Rainbow Electronics MAX17409 - Manual (Page 27)

MAX17409
1-Phase Quick-PWM GPU Controller
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where:
where R
SENSE
is the sensing resistor and R
CSP-CSN
/
R LX-CSN is the ratio of resistor-divider with DCR-sensing
approach.
Voltage Positioning and
Loop Compensation
Voltage positioning dynamically lowers the output volt-
age in response to the load current, reducing the out-
put capacitance and processor’s power dissipation
requirements. The controller uses a transconductance
amplifier to set the transient and DC output voltage
droop (Figure 2) as a function of the load. This adjusta-
bility allows flexibility in the selected current-sense
resistor value or inductor DCR, and allows smaller cur-
rent-sense resistance to be used, reducing the overall
power dissipated.
Steady-State Voltage Positioning
Connect a resistor (R
FB
) between FB and V
OUT
to set
the DC steady-state droop (load line) based on the
required voltage positioning slope (R
DROOP ):
where the effective current-sense resistance (R
SENSE
)
depends on the current-sense method (see the Current
Sense section), and the voltage-positioning amplifier’s
transconductance (G m(FB) ) is typically 600µS as
defined in the Electrical Characteristics table. When the
inductors’ DCR is used as the current-sense element
(R
SENSE
= R
DCR
), each current-sense input should
include an NTC thermistor to minimize the temperature
dependence of the voltage-positioning slope.
Output Capacitor Selection
The output filter capacitor must have low enough effec-
tive equivalent series resistance (ESR) to meet output
ripple and load-transient requirements, yet have high
enough ESR to satisfy stability requirements.
In processor core supplies and other applications where
the output is subject to large load transients, the output
capacitor’s size typically depends on how much ESR is
needed to prevent the output from dipping too low under a
load transient. Ignoring the sag due to finite capacitance:
In nonprocessor applications, the output capacitor’s
size often depends on how much ESR is needed to
maintain an acceptable level of output ripple voltage.
The output ripple voltage of a step-down controller
equals the total inductor ripple current multiplied by the
output capacitor’s ESR. The maximum ESR to meet rip-
ple requirements is:
where f
SW
is the switching frequency. The actual
capacitance value required relates to the physical size
needed to achieve low ESR, as well as to the chemistry
of the capacitor technology. Thus, the capacitor is usu-
ally selected by ESR and voltage rating rather than by
capacitance value (this is true of polymer types).
When using low-capacity ceramic filter capacitors,
capacitor size is usually determined by the capacity
needed to prevent V
SAG and V SOAR from causing
problems during load transients. Generally, once
enough capacitance is added to meet the overshoot
requirement, undershoot at the rising load edge is no
longer a problem (see the V
SAG and V SOAR equations
in the Transient Response section).
Output Capacitor Stability Considerations
For Quick-PWM controllers, stability is determined by
the value of the ESR zero relative to the switching fre-
quency. The boundary of instability is given by the fol-
lowing equation:
where:
and:
where C
OUT
is the total output capacitance, R
ESR
is the
total ESR, R SENSE is the current-sense resistance (R CM
= R CS ), R DROOP(AC) is the AC component of the droop,
and R PCB is the parasitic board resistance between the
output capacitors and sense resistors.
R R R R
EFF ESR DROOP AC PCB
= + +
( )
f
R C
ESR
EFF OUT
=
1
2 π
f
f
ESR
SW ≤
π
R
V f L
V V V
V
ESR
IN SW
IN OUT OUT
RIPPLE
≤
( )
⎡
⎣
⎢
⎢
⎤
⎦
⎥
⎥ -
R R
V
I
ESR PCB
STEP
LOAD MAX
+
( )
≤
∆
( )
R
R
R G
FB
DROOP
SENSE m FB
=
( )
I
V
R
V
DCR
R
R
VALLEY
LIMIT
SENSE
LIMIT
CSP CSN
LX
= =
× -
-C CSN