Rainbow Electronics MAX17409 User Manual

Page 17

MAX17409

1-Phase Quick-PWM GPU Controller

______________________________________________________________________________________

on-time by a period equal to the DH rising dead time. For
loads above the critical conduction point, where the
dead-time effect is no longer a factor, the actual switching
frequency is:

where V

DROP1

is the sum of the parasitic voltage drops

in the inductor discharge path, including synchronous
rectifier, inductor, and PCB resistances; V

DROP2

is the

sum of the parasitic voltage drops in the inductor charge
path, including high-side switch, inductor, and PCB resis-
tances; and t

is the on-time as determined above.

Current Sense

The output current is differentially sensed by the high-
impedance current-sense inputs (CSP and CSN). Low-
offset amplifiers are used for voltage-positioning gain,
current-limit protection, and power monitoring. Sensing
the current at the output offers advantages, including
less noise sensitivity and the flexibility to use either a
current-sense resistor or the DC resistance of the out-
put inductor.

Using the DC resistance (R

DCR

) of the output inductor

allows higher efficiency. In this configuration, the initial
tolerance and temperature coefficient of the inductor’s
DCR must be accounted for in the output-voltage droop-
error budget and power monitor. This current-sense
method uses an RC filtering network to extract the cur-
rent information from the inductor (see Figure 3). The
resistive divider used should provide a current-sense
resistance (R

) low enough to meet the current-limit

requirements, and the time constant of the RC network
should match the inductor’s time constant (L/R

and:

where R

is the required current-sense resistance,

and R

DCR

is the inductor’s series DC resistance. Use

the worst-case inductance and R

DCR

values provided

by the inductor manufacturer, adding some margin for
the inductance drop over temperature and load. To
minimize the current-sense error due to the current-
sense inputs’ bias current (I

CSP

and I

CSN

), choose

R1//R2 to be less than 2k

Ω and use the above equation

to determine the sense capacitance (C

). Choose

capacitors with 5% tolerance and resistors with 1% tol-
erance specifications. Temperature compensation is

recommended for this current-sense method. See the

Voltage Positioning and Loop Compensation

section.

When using a current-sense resistor for accurate output-
voltage positioning, the circuit requires a differential RC
filter to eliminate the AC voltage step caused by the
equivalent series inductance (L

ESL

) of the current-sense

resistor (see Figure 3). The ESL-induced voltage step
does not affect the average current-sense voltage, but
results in a significant peak current-sense voltage error
that results in unwanted offsets in the regulation voltage
and results in early current-limit detection. Similar to the
inductor DCR sensing method above, the RC filter’s time
constant should match the L/R time constant formed by
the current-sense resistor’s parasitic inductance:

where L

ESL

is the equivalent series inductance of the

current-sense resistor, R

SENSE

is the current-sense resis-

tance value, C

and R1 are the time-constant matching

components.

Current Limit

The current-limit circuit employs a “valley” current-
sensing algorithm that uses current-sense inputs (CSP to
CSN) as the current-sensing elements. If the current-
sense signal exceeds the current-limit threshold, the PWM
controller does not initiate a new cycle until the inductor
current drops below the valley current-limit threshold.

Since only the valley current level is actively limited, the
actual peak current is greater than the current-limit
threshold by an amount equal to the inductor ripple cur-
rent. Therefore, the exact current-limit characteristic
and maximum load capability are a function of the cur-
rent-sense resistance, inductor value, and battery volt-
age. When combined with the undervoltage protection
circuit, this current-limit method is effective in almost
every circumstance.

The positive current-limit threshold is fixed internally at
22.5mV (typ). There is also a negative current limit that
prevents excessive reverse inductor currents when
V

OUT

is sinking current. The negative current-limit

threshold is 130% of the nominal valley current-limit
threshold. When the inductor current drops below the
negative current limit, the controller immediately acti-
vates an on-time pulse—DL turns off and DH turns on—
allowing the inductor current to remain above the
negative current threshold.

Carefully observe the PCB layout guidelines to ensure
that noise and DC errors do not corrupt the current-sense
signals seen by the current-sense inputs (CSP, CSN).

ESL

SENSE

⎡
⎣⎢

⎤
⎦⎥

DCR

⎛

⎝⎜

⎞

⎠⎟

OUT

DROP

(

)

(

)