Toshiba TLP511E - Manual (Page 10)

4-3
4-2. Operation Description
The video signal of the odd number pixel (even number
pixel) is sent to Q501 (Q503) base and supplied to pin 16
of Q502 (Q504), LM1201M. The signal is clamped at
pin 16 and the pedestal voltage is adjusted at pin 6 after
the DC level is stabilized and then AC level is adjusted at
pin 3.
The signal is developed from pin 8, supplied to the buffer
circuits of Q505 – Q507 and Q511 – Q513, and supplied
to the inverted circuits of Q508, Q509, Q510, Q523,
Q525 and Q510. These signals are supplied to pins 5, 6,
8, 13, 15 and 16 of 12 phases development IC.
CXA2504N, Q516 and Q517 of sample-and-hold passing
through the SW circuit composed of Q514 and Q515.
The signals are developed from pins 37, 35, 33, 25 and
23 for each input.
The signals at pins 4, 7, 14 are used as bias input and the
bias inputs set the center DC voltage of output equal to
the bias voltage.
Q519 works to suppress the noise occurred at 12 phases
collective input process of the panel.
4-2-1. Outline of Liquid Crystal Panel
The liquid crystal panel module is an active matrix panel
with a built-in driver of multi-crystal silicon. The liquid
crystal panel module is designed for use of color projec-
tors in combination with an enlargement projection
system and dichroic mirror.
(1) Screen size 26.624 (W) x 19.968 (H)
(2) Pixel number 1024 (W) x 768 (H)
(3) Applicable to XGA
(4) Monochrome panel
(5) Drive system H inverted drive
(6) Dot clock 65 MHz
(7) Inverted function for UP/DOWN/LEFT/RIGHT di-
rections
4-2-2. Basic Component
Table 4-2-1 Terminal description
Pin No.
1
2
3
4
5
6
7
8
9
Name
DT
CLY
CLY
VDDY
NRS2
NRS1
LCCOM
VID11
VID9
Pin No.
10
11
12
13
14
15
16
17
18
Pin No.
19
20
21
22
23
24
25
26
27
Pin No.
28
29
30
31
32
33
34
35
36
Name
VID7
VID5
VID3
VID1
VSSX
CLX
CLX
DX
VDDX
Name
DIRX
DIRX
ENB2
ENB1
VSSX
VID2
VID4
VID6
VID8
Name
VID10
VID12
LCCOM
N.C.
NRG
DY
DIRY
DIRY
VSSY