National Instruments Data Acquisition Device NI USB-621x User Manual
Page 42

Chapter 4
Analog Input
© National Instruments Corporation
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Hardware-Timed Acquisitions—With hardware-timed acquisitions,
a digital hardware signal, AI Sample Clock, controls the rate of the
acquisition. This signal can be generated internally on your device or
provided externally.
Hardware-timed acquisitions have several advantages over
software-timed acquisitions:
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The time between samples can be much shorter.
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The timing between samples is deterministic.
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Hardware-timed acquisitions can use hardware triggering.
Hardware-timed operations are buffered. In a buffered acquisition,
data is moved from the DAQ device’s onboard FIFO memory to a
PC buffer using USB signal streams or programmed I/O before it is
transferred to application memory. Buffered acquisitions typically
allow for much faster transfer rates than non-buffered acquisitions
because data is moved in large blocks, rather than one point at a time.
One property of buffered I/O operations is the sample mode. The
sample mode can be either finite or continuous.
Finite sample mode acquisition refers to the acquisition of a specific,
predetermined number of data samples. After the specified number of
samples has been read in, the acquisition stops. If you use a reference
trigger, you must use finite sample mode.
Continuous acquisition refers to the acquisition of an unspecified
number of samples. Instead of acquiring a set number of data samples
and stopping, a continuous acquisition continues until you stop
the operation. Continuous acquisition is also referred to as
double-buffered or circular-buffered acquisition.
If data cannot be transferred across the bus fast enough, the FIFO
becomes full. New acquisitions will overwrite data in the FIFO before
it can be transferred to host memory. The device generates an error in
this case. With continuous operations, if the user program does not
read data out of the PC buffer fast enough to keep up with the data
transfer, the buffer could reach an overflow condition, causing an error
to be generated.